Difference between revisions of "Rock3/CM3p/e25/GPIO"
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{| class="wikitable" style="vertical-align:middle;" | {| class="wikitable" style="vertical-align:middle;" | ||
|- style="font-weight:bold; text-align:center;" | |- style="font-weight:bold; text-align:center;" | ||
− | ! | + | !Pin# |
+ | ! Function1 | ||
+ | ! Function2 | ||
+ | ! Function3 | ||
! Function4 | ! Function4 | ||
− | ! | + | ! Gpionumber |
− | + | ||
− | + | ||
− | + | ||
|- | |- | ||
+ | | 1 | ||
+ | | GPIO0_B4 | ||
+ | | CAN0_RX_M0 | ||
+ | | I2C1_SDA | ||
+ | | | ||
| 12 | | 12 | ||
− | |||
− | |||
− | |||
− | |||
− | |||
|- | |- | ||
− | | | + | | 2 |
+ | | GPIO3_C2 | ||
+ | | SPI1_MISO_M1 | ||
+ | | UART5_TX_M1 | ||
| I2S1_SDO3_M2 | | I2S1_SDO3_M2 | ||
− | | | + | |114 |
− | + | ||
− | + | ||
− | + | ||
|- | |- | ||
+ | | 3 | ||
+ | | GPIO3_C3 | ||
+ | | SPI1_CLK_M1 | ||
+ | | UART5_RX_M1 | ||
+ | | I2S1_SCLK_RX_M2 | ||
| 115 | | 115 | ||
− | |||
− | |||
− | |||
− | |||
− | |||
|- | |- | ||
+ | | 4 | ||
+ | | GPIO3_C0 | ||
+ | | PWM13_M0 | ||
+ | | UART3_RX_M1 | ||
+ | | | ||
|112 | |112 | ||
− | |||
− | |||
− | |||
− | |||
− | |||
|- | |- | ||
− | | | + | | 5 |
| GDD | | GDD | ||
| | | | ||
| | | | ||
| | | | ||
− | | | + | | |
|- | |- | ||
− | | | + | | 6 |
− | | | + | | GPIO1_A1 |
− | |CAN1_TX_M0 | + | | CAN1_TX_M0 |
− | |UART3_TX_M0 | + | | UART3_TX_M0 |
− | |I2C3_SCL_M0 | + | | I2C3_SCL_M0 |
− | | | + | | 33 |
|- | |- | ||
− | | | + | | 7 |
− | | | + | | GPIO1_A0 |
− | |CAN1_RX_M0 | + | | CAN1_RX_M0 |
− | |UART3_RX_M0 | + | | UART3_RX_M0 |
− | |I2C3_SDA_M0 | + | | I2C3_SDA_M0 |
− | | | + | | 32 |
|- | |- | ||
− | |||
− | |||
− | |||
− | |||
− | |||
|8 | |8 | ||
+ | | GPIO3_A1 | ||
+ | | SPI1_CS0_M1 | ||
+ | | | ||
+ | | | ||
+ | | 97 | ||
|- | |- | ||
− | | | + | | 9 |
− | | | + | | GPIO3_C1 |
− | | | + | | I2S1_SDO2_M2 |
− | |SPI1_MOSI_M1 | + | | SPI1_MOSI_M1 |
+ | | | ||
+ | | 113 | ||
+ | |- | ||
+ | | 10 | ||
+ | | GPIO0_B3 | ||
+ | | CAN0_TX_M0 | ||
+ | | I2C1_SCL | ||
| | | | ||
− | |||
− | |||
| 11 | | 11 | ||
− | |||
− | |||
− | |||
− | |||
− | |||
|- | |- | ||
Revision as of 12:04, 26 January 2022
ROCK 3 > Hardware > Radxa E25 GPIO
General purpose input-output (GPIO) connector
Radxa E25 has a 10-pin expansion header.
Pin# | Function1 | Function2 | Function3 | Function4 | Gpionumber |
---|---|---|---|---|---|
1 | GPIO0_B4 | CAN0_RX_M0 | I2C1_SDA | 12 | |
2 | GPIO3_C2 | SPI1_MISO_M1 | UART5_TX_M1 | I2S1_SDO3_M2 | 114 |
3 | GPIO3_C3 | SPI1_CLK_M1 | UART5_RX_M1 | I2S1_SCLK_RX_M2 | 115 |
4 | GPIO3_C0 | PWM13_M0 | UART3_RX_M1 | 112 | |
5 | GDD | ||||
6 | GPIO1_A1 | CAN1_TX_M0 | UART3_TX_M0 | I2C3_SCL_M0 | 33 |
7 | GPIO1_A0 | CAN1_RX_M0 | UART3_RX_M0 | I2C3_SDA_M0 | 32 |
8 | GPIO3_A1 | SPI1_CS0_M1 | 97 | ||
9 | GPIO3_C1 | I2S1_SDO2_M2 | SPI1_MOSI_M1 | 113 | |
10 | GPIO0_B3 | CAN0_TX_M0 | I2C1_SCL | 11 |
GPIO number
Rockchip RK3568 GPIO has 5 banks, GPIO0 to GPIO4, each bank has 32pins, naming as below:
GPIO0_A0 ~ A7 GPIO0_B0 ~ B7 GPIO0_C0 ~ C7 GPIO0_D0 ~ D7 GPIO1_A0 ~ A7 .... GPIO1_D0 ~ D7
For Rockchip 4.19 kernel, the GPIO number can be calculated as below, take GPIO4_D1 (PIN26 on 4-0PIN HEADER) as an example:
GPIO4_D1 = 4*32 + 3*8 + 1 = 153 (A=0, B=1, C=2, D=3)
To set GPIO4_D1 output
cd /sys/class/gpio echo 153 > export cd gpio153 echo out > direction echo 1 > value # output high echo 0 > value # output low