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Difference between revisions of "Zero/hardware/gpio"

< Zero‎ | hardware
(Created page with "{{Zero_header}} {{Languages|zero/hardware/gpio}} Radxa Zero > Hardware > GPIO")
 
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  [[Zero | Radxa Zero]] > [[zero/hardware | Hardware]] > [[zero/hardware/gpio | GPIO]]
 
  [[Zero | Radxa Zero]] > [[zero/hardware | Hardware]] > [[zero/hardware/gpio | GPIO]]
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 +
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{| class="wikitable" style="vertical-align:middle; background-color:#F9F9F9;"
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|- style="font-weight:bold; text-align:center; background-color:#F2F2F2;"
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! GPIO number
 +
! Function4
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! Function3
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! Function2
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! Function1
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! Pin#
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!
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! Pin#
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! Function1
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! Function2
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! Function3
 +
! Function4
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! GPIO number
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|-
 +
|
 +
|
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|
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|
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| +3.3V
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| style="background-color:#FF0;" | 1
 +
|
 +
| style="background-color:#F00;" | 2
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| +5.0V
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|
 +
|
 +
|
 +
|
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|-
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|
 +
|
 +
|
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| I2CEE_SDA_M3
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| GPIOA_14
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| style="background-color:#008000; color:#FFF;" | 3
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|
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| style="background-color:#F00;" | 4
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| +5.0V
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|
 +
|
 +
|
 +
|
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|-
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|
 +
|
 +
|
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| I2CEE_SCL_M3
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| GPIOA_15
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| style="background-color:#008000; color:#FFF;" | 5
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|
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| style="color:#FFF;" | 6
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| GND
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|
 +
|
 +
|
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|
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|-
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|
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|
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| UARTAO_B_TX
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| I2CAO_SCL_M0
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| GPIOAO_3
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| style="background-color:#008000; color:#FFF;" | 7
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|
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| style="background-color:#008000; color:#FFF;" | 8
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| GPIOAO_0
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| style="background-color:#FFA500;" | UARTAO_A_TXD
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|
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|
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|
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|-
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|
 +
|
 +
|
 +
|
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| GND
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| style="color:#FFF;" | 9
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|
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| style="background-color:#008000; color:#FFF;" | 10
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| GPIOAO_1
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| style="background-color:#FFA500;" | UARTAO_A_RXD
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|
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|
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|
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|-
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|
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|
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| UARTAO_B_RX
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| I2CAO_SDA_M0
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| GPIOAO_2
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| style="background-color:#008000; color:#FFF;" | 11
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|
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| style="background-color:#008000; color:#FFF;" | 12
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| GPIOX_9
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| SPIA_MISO
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|
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|
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|
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|-
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|
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|
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| I2C_EE_SCL_M1
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| SPIA_SCLK
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| GPIOX11
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| style="background-color:#008000; color:#FFF;" | 13
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|
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| style="color:#FFF;" | 14
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| GND
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|
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|
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|
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|
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|-
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|
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|
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|
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|
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| ADC1
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| style="background-color:#008000; color:#FFF;" | 15
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|
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| style="background-color:#008000; color:#FFF;" | 16
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| GPIOX_10
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| SPIA_SS0
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| I2C_EE_SDA_M1
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|
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|
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|-
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|
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|
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|
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|
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| +3.3V
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| style="background-color:#FF0;" | 17
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|
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| style="background-color:#008000; color:#FFF;" | 18
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| GPIOX_8
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| SPIA_MOSI
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| PWMC
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|
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|
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|-
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|
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|
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| SPIB_MOSI
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| UARTEE_C_RTS
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| GPIOH_4
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| style="background-color:#008000; color:#FFF;" | 19
 +
|
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| style="color:#FFF;" | 20
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| GND
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|
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|
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|
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|
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|-
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|
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| PWMF
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| SPIB_MISO
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| UARTEE_C_CTS
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| GPIOH_5
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| style="background-color:#008000; color:#FFF;" | 21
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|
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| style="background-color:#008000; color:#FFF;" | 22
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| GPIOC_7
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| -
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|
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|
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|
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|-
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|
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|
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| SPIB_SCLK
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| UARTEE_C_TX
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| GPIOH_7
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| style="background-color:#008000; color:#FFF;" | 23
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|
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| style="background-color:#008000; color:#FFF;" | 24
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| GPIOH_6
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| UARTEE_C_RX
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| SPIB_SS0
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|
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|
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|-
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|
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|
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|
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|
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| GND
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| style="color:#FFF;" | 25
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|
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| style="background-color:#008000; color:#FFF;" | 26
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| ADC2
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|
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|
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|
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|
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|-
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|
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|
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| UARTAO_B_TX
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| I2CAO_SCL
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| GPIOAO_3
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| style="background-color:#00F; color:#FFF;" | 27
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|
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| style="background-color:#00F; color:#FFF;" | 28
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| GPIOAO_2
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| I2CAO_SDA
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| UARTAO_B_RX
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|
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|
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|-
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|
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|
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|
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|
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| NC
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| style="background-color:#008000; color:#FFF;" | 29
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|
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| style="color:#FFF;" | 30
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| GND
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|
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|
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|
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|
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|-
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|
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|
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|
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|
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| NC
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| style="background-color:#008000; color:#FFF;" | 31
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|
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| style="background-color:#008000; color:#FFF;" | 32
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| GPIOAO_4
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| PWMAO_C
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|
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|
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|
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|-
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|
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|
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|
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|
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| NC
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| style="background-color:#008000; color:#FFF;" | 33
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|
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| style="color:#FFF;" | 34
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| GND
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|
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|
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|
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|
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|-
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|
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|
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| UARTAO_B_TX
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| TDMB_SCLK
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| GPIOAO_8
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| style="background-color:#008000; color:#FFF;" | 35
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|
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| style="background-color:#008000; color:#FFF;" | 36
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| GPIOH_8
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| -
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|
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|
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|
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|-
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|
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|
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| UARTAO_B_RX
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| MCLK0
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| GPIOAO_9
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| style="background-color:#008000; color:#FFF;" | 37
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|
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| style="background-color:#008000; color:#FFF;" | 38
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| GPIOAO_10
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| TDMB_D1
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|
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|
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|
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|-
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|
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|
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|
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|
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| GND
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| style="color:#FFF;" | 39
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|
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| style="background-color:#008000; color:#FFF;" | 40
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| GPIOAO_11
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| PWMAO_A
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|
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|
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|
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|}
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 +
== GPIO number ==
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* GPIO are in two banks, GPIO AO domain and GPIO EE domain
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** AO domain: GPIOAO_0 - GPIOAO_11
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** EE domain: GPIOA_14 - GPIOA_15 | GPIOH_0 - GPIOH_8 | GPIOX_0 - GPIOX_19
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* UARTs
 +
** AO domain: UARTAO_A | UARTAO_B
 +
** EE domain: UART_A | UART_B | UART_C

Revision as of 11:26, 4 September 2021

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 Radxa Zero >  Hardware >  GPIO


GPIO number Function4 Function3 Function2 Function1 Pin# Pin# Function1 Function2 Function3 Function4 GPIO number
+3.3V 1 2 +5.0V
I2CEE_SDA_M3 GPIOA_14 3 4 +5.0V
I2CEE_SCL_M3 GPIOA_15 5 6 GND
UARTAO_B_TX I2CAO_SCL_M0 GPIOAO_3 7 8 GPIOAO_0 UARTAO_A_TXD
GND 9 10 GPIOAO_1 UARTAO_A_RXD
UARTAO_B_RX I2CAO_SDA_M0 GPIOAO_2 11 12 GPIOX_9 SPIA_MISO
I2C_EE_SCL_M1 SPIA_SCLK GPIOX11 13 14 GND
ADC1 15 16 GPIOX_10 SPIA_SS0 I2C_EE_SDA_M1
+3.3V 17 18 GPIOX_8 SPIA_MOSI PWMC
SPIB_MOSI UARTEE_C_RTS GPIOH_4 19 20 GND
PWMF SPIB_MISO UARTEE_C_CTS GPIOH_5 21 22 GPIOC_7 -
SPIB_SCLK UARTEE_C_TX GPIOH_7 23 24 GPIOH_6 UARTEE_C_RX SPIB_SS0
GND 25 26 ADC2
UARTAO_B_TX I2CAO_SCL GPIOAO_3 27 28 GPIOAO_2 I2CAO_SDA UARTAO_B_RX
NC 29 30 GND
NC 31 32 GPIOAO_4 PWMAO_C
NC 33 34 GND
UARTAO_B_TX TDMB_SCLK GPIOAO_8 35 36 GPIOH_8 -
UARTAO_B_RX MCLK0 GPIOAO_9 37 38 GPIOAO_10 TDMB_D1
GND 39 40 GPIOAO_11 PWMAO_A

GPIO number

  • GPIO are in two banks, GPIO AO domain and GPIO EE domain
    • AO domain: GPIOAO_0 - GPIOAO_11
    • EE domain: GPIOA_14 - GPIOA_15 | GPIOH_0 - GPIOH_8 | GPIOX_0 - GPIOX_19
  • UARTs
    • AO domain: UARTAO_A | UARTAO_B
    • EE domain: UART_A | UART_B | UART_C
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