Difference between revisions of "Rock3/CM/CM3I/E25/GPIO"
(→Radxa E25 V1.4 has a 24-pin expansion header.) |
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| − | ====Radxa E25 V1.4 has a | + | ====Radxa E25 V1.4 has a 26-pin expansion header. ==== |
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* CAN: x1;CAN0 | * CAN: x1;CAN0 | ||
| − | ==== More details about | + | ==== More details about 24-pin Header In V1.4 ==== |
* PWM;x6; PWM7_IR/PWM12_M0/PWM13_M0/PWM13_M1/PWM14_M0/PWM15_IR_M0 | * PWM;x6; PWM7_IR/PWM12_M0/PWM13_M0/PWM13_M1/PWM14_M0/PWM15_IR_M0 | ||
* SPI: x2; SPI0/SPI1 | * SPI: x2; SPI0/SPI1 | ||
Latest revision as of 08:16, 18 November 2022
ROCK 3 > Compute Module > CM3 Industrial > Radxa E25 > GPIO
Contents
General purpose input-output (GPIO) connector
Radxa E25 V1.3 has a 10-pin expansion header.
| Pin# | Function1 | Function2 | Function3 | Function4 | Gpionumber |
|---|---|---|---|---|---|
| 1 | GPIO0_B4 | CAN0_RX_M0 | I2C1_SDA | 12 | |
| 2 | GPIO3_C2 | SPI1_MISO_M1 | UART5_TX_M1 | I2S1_SDO3_M2 | 114 |
| 3 | GPIO3_C3 | SPI1_CLK_M1 | UART5_RX_M1 | I2S1_SCLK_RX_M2 | 115 |
| 4 | GPIO3_C0 | PWM13_M0 | UART3_RX_M1 | 112 | |
| 5 | GND | ||||
| 6 | GPIO1_A1 | CAN1_TX_M0 | UART3_TX_M0 | I2C3_SCL_M0 | 33 |
| 7 | GPIO1_A0 | CAN1_RX_M0 | UART3_RX_M0 | I2C3_SDA_M0 | 32 |
| 8 | GPIO3_A1 | SPI1_CS0_M1 | 97 | ||
| 9 | GPIO3_C1 | I2S1_SDO2_M2 | SPI1_MOSI_M1 | 113 | |
| 10 | GPIO0_B3 | CAN0_TX_M0 | I2C1_SCL | 11 |
Radxa E25 V1.4 has a 26-pin expansion header.
| E25 V1.4 | ||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Gpio number | Function5 | Function4 | Function3 | Function2 | Function1 | GPIO | PIN26 | GPIO | Function1 | Function2 | Function3 | Function4 | Function5 | Gpio number | ||
| +3.3V | 1 | 2 | +5V | |||||||||||||
| 32 | I2C3_SDA_M0 | CAN1_RX_M0 | UART3_RX_M0 | GPIO1_A0 | 3 | 4 | +5V | |||||||||
| 33 | I2C3_SCL_M0 | CAN1_TX_M0 | UART3_TX_M0 | GPIO1_A1 | 5 | 6 | GND | |||||||||
| 111 | UART3_TX_M1 | PWM12_M0 | GPIO3_B7 | 7 | 8 | GPIO3_C2 | SPI1_MISO_M1 | UART5_TX_M1 | I2S1_SDO3_M2 | 114 | ||||||
| GND | 9 | 10 | GPIO3_C3 | SPI1_CLK_M1 | UART5_RX_M1 | I2S1_SCLK_RX_M2 | 115 | |||||||||
| 116 | UART7_TX_M1 | PWM14_M0 | GPIO3_C4 | 11 | 12 | GPIO3_A3 | 99 | |||||||||
| 117 | I2S1_LRCK_RX_M2 | UART7_RX_M1 | PWM15_IR_M0 | GPIO3_C5 | 13 | 14 | GND | |||||||||
| 113 | I2S1_SDO2_M2 | SPI1_MOSI_M1 | GPIO3_C1 | 15 | 16 | GPIO2_D2 | SPI0_CSO_M1 | I2S1_LRCK_TX_M2 | 90 | |||||||
| 97 | SPI1_CSO_M1 | GPIO3_A1 | 17 | 18 | GPIO0_C6 | SPI0_CS0_M0 | PWM7_IR | 22 | ||||||||
| 89 | I2S1_SCLK_TX_M2 | SPI0_MOSI_M1 | GPIO2_D1 | 19 | 20 | GND | ||||||||||
| 88 | I2S1_MCLK_M2 | SPI0_MISO_M1 | GPIO2_D0 | 21 | 22 | SARADC_VIN5 | ||||||||||
| 91 | I2S1_SDI0_M2 | SPI0_CLK_M1 | GPIO2_D3 | 23 | 24 | GPIO4_C6 | PWM13_M1 | 150 | ||||||||
| GND | 25 | 26 | GPIO3_C0 | PWM13_M0 | UART3_RX_M1 | 112 | ||||||||||
More details about 10-pin Header In V1.3
- PWM;x1; PWM13
- SPI: x1; PSI1
- I2C: x2;I2C1/I2C3
- UART: x2;UART3/UART5
- CAN: x1;CAN0
More details about 24-pin Header In V1.4
- PWM;x6; PWM7_IR/PWM12_M0/PWM13_M0/PWM13_M1/PWM14_M0/PWM15_IR_M0
- SPI: x2; SPI0/SPI1
- I2C: x1;I2C3_M0
- UART: x3;UART3_M0/UART3_M1/UART5_M1
- CAN: x1;CAN1_M0
GPIO number
Rockchip RK3568 GPIO has 5 banks, GPIO0 to GPIO4, each bank has 32pins, naming as below:
GPIO0_A0 ~ A7 GPIO0_B0 ~ B7 GPIO0_C0 ~ C7 GPIO0_D0 ~ D7 GPIO1_A0 ~ A7 .... GPIO1_D0 ~ D7
For Rockchip 4.19 kernel, the GPIO number can be calculated as below, take GPIO3_C2 (PIN2 on 10-PIN HEADER) as an example:
GPIO3_C2 = 3*32 + 2*8 + 2 = 114 (A=0, B=1, C=2, D=3)
To set GPIO3_C2 output
cd /sys/class/gpio echo 114> export cd gpio114 echo out > direction echo 1 > value # output high echo 0 > value # output low