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Difference between revisions of "Rock5/hardware/5b/gpio"

< Rock5‎ | hardware‎ | 5b
(General purpose input-output (GPIO) connector)
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Revision as of 16:08, 3 June 2022


    ROCK 5 >  Hardware >  ROCK 5 Model B Main Board >  GPIO

General purpose input-output (GPIO) connector

ROCK 5B has one 40-pin expansion header. Each pin is distinguished by color.

GPIO number Function7 Function6 Function5 Function4 Function3 Function2 Function1 Pin# Pin# Function1 Function2 Function3 Function4 Function5 Function6 Function7 GPIO number
+3.3V 1 2 +5.0V
I2S1_SDO2_M0 I2C7_SDA_M3 UART8_CTSN_M0 PWM15_IR_M1 CAN1_TX_M1 GPIO4_B3 3 4 +5.0V
I2S1_SDO1_M0 I2C7_SCL_M3 UART8_RTSN_M0 SPI0_CS0_M1 PWM14_M1 CAN1_RX_M1 GPIO4_B2 5 6 GND
SPI1_CS1_M1 I2C8_SDA_M4 UART7_CTSN_M1 PWM15_IR_M0 GPIO3_C3 7 8 GPIO0_B5 UART2_TX_M0 I2S1_MCLK_M1 I2C1_SCL_M0
GND 9 10 GPIO0_B6 UART2_RX_M0 I2S1_SCLK_M1 I2C1_SDA_M0
SPI1_CLK_M1 UART7_RX_M1 GPIO3_C1 11 12 GPIO3_B5 PWM12_M0 CAN1_RX_M0 UART3_TX_M1 I2S2_SCLK_M1
SPI1_MOSI_M1 I2C3_SCL_M1 GPIO3_B7 13 14 GND
SPI1_MISO_M1 I2C3_SDA_M1 UART7_TX_M1 GPIO3_C0 15 16 GPIO3_A4 SPI4_CS1_M1 UART8_RTSN_M1 I2S3_SDI
+3.3V 17 18 GPIO4_C4 I2C7_SDA_M1 UART9_RTSN_M0 SPI3_MISO_M0 PWM5_M2
UART4_RX_M2 PDM1_SDI3_M1 SPI0_MOSI_M2 GPIO1_B2 19 20 GND
PDM1_SDI2_M1 SPI0_MISO_M2 GPIO1_B1 21 22 SARADC_IN4
UART4_TX_M2 PDM1_CLK1_M1 SPI0_CLK_M2 GPIO1_B3 23 24 GPIO1_B4 SPI0_CS0_M2 PDM1_CLK0_M1 UART7_RX_M2
GND 25 26 GPIO1_B5 SPI0_CS1_M2 UART7_TX_M2
PWM7_IR_M3 SPI3_CLK_M0 UART7_CTSN_M0 I2C0_SDA_M1 GPIO4_C6 27 28 GPIO4_C5 I2C0_SCL_M1 UART9_CTSN_M0 SPI3_MOSI_M0 PWM6_M2
UART1_CTSN_M1 I2C8_SDA_M2 PWM15_IR_M3 GPIO1_D7 29 30 GND
UART1_RX_M1 I2C5_SDA_M3 SPDIF_TX_M0 PWM13_M2 GPIO1_B7 31 32 GPIO3_C2 PWM14_M0 UART7_RTSN_M1 I2C8_SCL_M4 SPI1_CS0_M1
PWM8_M0 GPIO3_A7 33 34 GND
I2S2_LRCK_M1 UART3_RX_M1 CAN1_TX_M0 PWM13_M0 GPIO3_B6 35 36 GPIO3_B1 PWM2_M1 UART2_TX_M2
REFCLK_OUT GPIO0_A0 37 38 GPIO3_B2 PWM3_IR_M1 UART2_RX_M2 I2S2_SDI_M1
GND 39 40 GPIO3_B3 UART2_RTSN I2S2_SDO_M1

IO Voltage

GPIO number

Rockchip RK3588 GPIO has 5 banks, GPIO0 to GPIO4, each bank has 32pins, naming as below:

GPIO0_A0 ~ A7 
GPIO0_B0 ~ B7
GPIO0_C0 ~ C7
GPIO0_D0 ~ D7
   
GPIO1_A0 ~ A7
....
GPIO1_D0 ~ D7