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| − | {{rock3_header}}
| + | #redirect [[rock3/CM/CM3I/E25/GPIO]] |
| − | {{Languages|rock3/hardware/gpio}}
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| − | [[rock3 | ROCK 3]] > [[rock3/CM3p | ROCK 3 Compute Module Plus]] > [[rock3/CM3p/e25 | Radxa E25]] > [[rock3/CM3p/e25/GPIO | GPIO]]
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| − | == <span id="gpio">General purpose input-output (GPIO) connector</span> ==
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| − | Radxa E25 has a 10-pin expansion header.
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| − | {| class="wikitable" style="vertical-align:middle;"
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| − | |- style="font-weight:bold; text-align:center;"
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| − | !Pin#
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| − | ! Function1
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| − | ! Function2
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| − | ! Function3
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| − | ! Function4
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| − | ! Gpionumber
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| − | | style="background-color:#008000; color:#FFF;" | 1
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| − | | GPIO0_B4
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| − | | CAN0_RX_M0
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| − | | I2C1_SDA
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| − | | 12
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| − | |-
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| − | | style="background-color:#008000; color:#FFF;" | 2
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| − | | GPIO3_C2
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| − | | SPI1_MISO_M1
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| − | | UART5_TX_M1
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| − | | I2S1_SDO3_M2
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| − | |114
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| − | |-
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| − | | style="background-color:#008000; color:#FFF;" | 3
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| − | | GPIO3_C3
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| − | | SPI1_CLK_M1
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| − | | UART5_RX_M1
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| − | | I2S1_SCLK_RX_M2
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| − | | 115
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| − | |-
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| − | | style="background-color:#008000; color:#FFF;" | 4
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| − | | GPIO3_C0
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| − | | PWM13_M0
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| − | | UART3_RX_M1
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| − | |112
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| − | | style="background-color:#000; color:#FFF" | 5
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| − | | GND
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| − | | style="background-color:#008000; color:#FFF;" | 6
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| − | | GPIO1_A1
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| − | | CAN1_TX_M0
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| − | | UART3_TX_M0
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| − | | I2C3_SCL_M0
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| − | | 33
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| − | |-
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| − | | style="background-color:#008000; color:#FFF;" | 7
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| − | | GPIO1_A0
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| − | | CAN1_RX_M0
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| − | | UART3_RX_M0
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| − | | I2C3_SDA_M0
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| − | | 32
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| − | |-
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| − | | style="background-color:#008000; color:#FFF;" | 8
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| − | | GPIO3_A1
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| − | | SPI1_CS0_M1
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| − | | 97
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| − | |-
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| − | | style="background-color:#008000; color:#FFF;" | 9
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| − | | GPIO3_C1
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| − | | I2S1_SDO2_M2
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| − | | SPI1_MOSI_M1
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| − | | 113
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| − | |-
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| − | | style="background-color:#008000; color:#FFF;" | 10
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| − | | GPIO0_B3
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| − | | CAN0_TX_M0
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| − | | I2C1_SCL
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| − | | 11
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| − | |}
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| − | ==== More details about 10-pin Header In V1.3 ====
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| − | * PWM;x1; PWM13
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| − | * SPI: x1; PSI1
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| − | * I2C: x2;I2C1/I2C3/
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| − | * UART: x2;UART3/UART5
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| − | * CAN: x1;CAN0
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| − | === GPIO number ===
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| − | Rockchip RK3568 GPIO has 5 banks, GPIO0 to GPIO4, each bank has 32pins, naming as below:
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| − | GPIO0_A0 ~ A7
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| − | GPIO0_B0 ~ B7
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| − | GPIO0_C0 ~ C7
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| − | GPIO0_D0 ~ D7
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| − | GPIO1_A0 ~ A7
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| − | ....
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| − | GPIO1_D0 ~ D7
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| − | For Rockchip 4.19 kernel, the GPIO number can be calculated as below, take GPIO3_C2 (PIN2 on 10-PIN HEADER) as an example:
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| − | GPIO3_C2 = 3*32 + 2*8 + 2 = 114
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| − | (A=0, B=1, C=2, D=3)
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| − | To set GPIO3_C2 output
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| − | cd /sys/class/gpio
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| − | echo 114> export
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| − | cd gpio114
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| − | echo out > direction
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| − | echo 1 > value # output high
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| − | echo 0 > value # output low
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