Zero/hardware/gpio

2021-09-18T01:09:53Z

Dbtx: fix functions of pins 27 & 28 to match GPIOAO in Quick Reference and schematic ~~~~

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[[Zero | Radxa Zero]] > [[zero/hardware | Hardware]] > [[zero/hardware/gpio | GPIO]]

{| class="wikitable" style="vertical-align:middle; background-color:#F9F9F9;"
|- style="font-weight:bold; text-align:center; background-color:#F2F2F2;"
! GPIO number
! Function4
! Function3
! Function2
! Function1
! Pin#
!
! Pin#
! Function1
! Function2
! Function3
! Function4
! GPIO number
|-
|
|
|
|
| +3.3V
| style="background-color:#FF0;" | 1
|
| style="background-color:#F00;" | 2
| +5.0V
|
|
|
|
|-
|
|
|
| I2CEE_SDA_M3
| GPIOA_14
| style="background-color:#008000; color:#FFF;" | 3
|
| style="background-color:#F00;" | 4
| +5.0V
|
|
|
|
|-
|
|
|
| I2CEE_SCL_M3
| GPIOA_15
| style="background-color:#008000; color:#FFF;" | 5
|
| style="background-color:#000000; color:#FFF;" | 6
| GND
|
|
|
|
|-
|
|
| UARTAO_B_TX
| I2CAO_SCL_M0
| GPIOAO_3
| style="background-color:#008000; color:#FFF;" | 7
|
| style="background-color:#008000; color:#FFF;" | 8
| GPIOAO_0
| style="background-color:#FFA500;" | UARTAO_A_TXD
|
|
|
|-
|
|
|
|
| GND
| style="background-color:#000000; color:#FFF;" | 9
|
| style="background-color:#008000; color:#FFF;" | 10
| GPIOAO_1
| style="background-color:#FFA500;" | UARTAO_A_RXD
|
|
|
|-
|
|
| UARTAO_B_RX
| I2CAO_SDA_M0
| GPIOAO_2
| style="background-color:#008000; color:#FFF;" | 11
|
| style="background-color:#008000; color:#FFF;" | 12
| GPIOX_9
| SPIA_MISO
|
|
|
|-
|
|
| I2C_EE_SCL_M1
| SPIA_SCLK
| GPIOX11
| style="background-color:#008000; color:#FFF;" | 13
|
| style="background-color:#000000; color:#FFF;" | 14
| GND
|
|
|
|
|-
|
|
|
|
| ADC1
| style="background-color:#008000; color:#FFF;" | 15
|
| style="background-color:#008000; color:#FFF;" | 16
| GPIOX_10
| SPIA_SS0
| I2C_EE_SDA_M1
|
|
|-
|
|
|
|
| +3.3V
| style="background-color:#FF0;" | 17
|
| style="background-color:#008000; color:#FFF;" | 18
| GPIOX_8
| SPIA_MOSI
| PWMC
|
|
|-
|
|
| SPIB_MOSI
| UARTEE_C_RTS
| GPIOH_4
| style="background-color:#008000; color:#FFF;" | 19
|
| style="background-color:#000000; color:#FFF;" | 20
| GND
|
|
|
|
|-
|
| PWMF
| SPIB_MISO
| UARTEE_C_CTS
| GPIOH_5
| style="background-color:#008000; color:#FFF;" | 21
|
| style="background-color:#008000; color:#FFF;" | 22
| GPIOC_7
| -
|
|
|
|-
|
|
| SPIB_SCLK
| UARTEE_C_TX
| GPIOH_7
| style="background-color:#008000; color:#FFF;" | 23
|
| style="background-color:#008000; color:#FFF;" | 24
| GPIOH_6
| UARTEE_C_RX
| SPIB_SS0
|
|
|-
|
|
|
|
| GND
| style="background-color:#000000; color:#FFF;" | 25
|
| style="background-color:#008000; color:#FFF;" | 26
| ADC2
|
|
|
|
|-
|
|
| UARTAO_B_RX
| I2CAO_SDA
| GPIOAO_3
| style="background-color:#00F; color:#FFF;" | 27
|
| style="background-color:#00F; color:#FFF;" | 28
| GPIOAO_2
| I2CAO_SCL
| UARTAO_B_TX
|
|
|-
|
|
|
|
| NC
| style="background-color:#008000; color:#FFF;" | 29
|
| style="background-color:#000000; color:#FFF;" | 30
| GND
|
|
|
|
|-
|
|
|
|
| NC
| style="background-color:#008000; color:#FFF;" | 31
|
| style="background-color:#008000; color:#FFF;" | 32
| GPIOAO_4
| PWMAO_C
|
|
|
|-
|
|
|
|
| NC
| style="background-color:#008000; color:#FFF;" | 33
|
| style="background-color:#000000; color:#FFF;" | 34
| GND
|
|
|
|
|-
|
|
| UARTAO_B_TX
| TDMB_SCLK
| GPIOAO_8
| style="background-color:#008000; color:#FFF;" | 35
|
| style="background-color:#008000; color:#FFF;" | 36
| GPIOH_8
| -
|
|
|
|-
|
|
| UARTAO_B_RX
| MCLK0
| GPIOAO_9
| style="background-color:#008000; color:#FFF;" | 37
|
| style="background-color:#008000; color:#FFF;" | 38
| GPIOAO_10
| TDMB_D1
|
|
|
|-
|
|
|
|
| GND
| style="background-color:#000000; color:#FFF;" | 39
|
| style="background-color:#008000; color:#FFF;" | 40
| GPIOAO_11
| PWMAO_A
|
|
|
|}

== GPIO number ==
* GPIO are in two banks, GPIO AO domain and GPIO EE domain
** AO domain: GPIOAO_0 - GPIOAO_11
** EE domain: GPIOA_14 - GPIOA_15 | GPIOH_0 - GPIOH_8 | GPIOX_0 - GPIOX_19
* UARTs
** AO domain: UARTAO_A | UARTAO_B
** EE domain: UART_A | UART_B | UART_C

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Zero/hardware/gpio